FPL 2019 | UPC/BSC Campus | Barcelona, Spain

Workshop Description

Scientific high-performance computing (HPC) is an application domain that constantly pushes the limits of what is possible in computing, and where the acceleration and energy-efficiency of FPGAs should be enormously useful. However, the most powerful current supercomputers, and even the exascale supercomputers being proposed for the coming years, still only include CPUs and GPUs. Smaller scale HPC production systems, such as those at the University of Tsukuba and Paderborn University, have begun to incorporate FPGAs, and provide a platform for the evaluation of FPGAs on scientific computing workloads.

Meanwhile Cloud Computing infrastructures (e.g. by Amazon, Microsoft and Baidu) have started to adopt FPGAs for key workloads such as network acceleration and AI/machine learning via deep neural networks on a larger scale, but the Cloud has yet to supplant traditional supercomputers for HPC.

With the end of Moore’s Law, the landscape of HPC is changing quickly, providing a ripe opportunity for FPGAs to break into HPC computing. Super computers require unprecedented amounts of energy to run, and must apply to a growing space of applications, making the energy-efficiency and adaptability of reconfigurable hardware increasingly attractive. In addition, super computers often have expensive custom networks, but FPGA-based SmartNICs have shown performance and scalability on Cloud workloads, and offer the additional opportunity of doing in-network computing. Machine learning models are also becoming increasingly important in HPC, and reduced precision models have been shown to be nearly as effective as double-precision models, making room for FPGAs to operate on data types other than double-precision floating point.

To actually realize the potential of FPGAs in HPC environments, we will need to bridge the gap between the development methodologies of HPC developers (who are often scientists, not software engineers) and the skill set needed to effectively develop for FPGAs as well the system architecture of the FPGA-based infrastructures. While OpenCL and other HLS tools are a beginning, there is still an enormous need for improving tools, supporting common scientific computing libraries, providing compatibility across different types of supercomputers, and developing operating systems that support FPGA-based computing.

The aim of this workshop, which compliments FPL’s aims in the rapidly growing area of field-programmable logic, is to bring researchers from academia and industry to present and discuss both the potential and the limitations of efficiently incorporating FPGA devices into HPC systems. This includes SW/HW co-design, programming models and environments, systems software, runtime systems, architectures, intercommunication and applications.

In particular, topics of the ReHPC Workshop include, but are not limited to:

  • Architectures for Reconfigurable HPC
  • Programming Environments and Tools for FPGA-tailored HPC systems
  • Runtime systems for Reconfigurable HPC
  • Intercommunication in Reconfigurable HPC Systems
  • Tailor-made Applications for HPC systems incorporating FPGAs
  • Benchmarks for Reconfigurable HPC Systems
  • Project/collaboration initiatives for Reconfigurable HPC Systems